1. Field of the Invention
The present invention relates to a method for fabricating a semiconductor device having capacitors, and more particularly, to a method for fabricating an integrated circuit (IC) to be used for communication application, which can process a radio frequency signal.
2. Discussion of the Related Art
With the rapid development of the communication market, there have been many developments of related semiconductor devices. So far, the developments of semiconductor devices for communication field have been mostly based on chemical semiconductors, such as GaAs which is operative at a high speed and has an excellent radio frequency characteristic. Also, so far the emphasis has been on performance since the market has been small. However, the rapid growth of the communication market following the development of new communication and personal radio communication means has led to research and studies focused on low cost personal communication devices. Accordingly, instead of chemical semiconductor devices with high cost and unsophisticated high density device packing techniques, development of silicon semiconductor devices for communication applications becomes important.
Because of the development of device packing techniques and various other new techniques, there have been significant improvements in speed and radio frequency processing techniques of the silicon semiconductor devices. Accordingly, it is possible to fabricate semiconductor devices by using micronization line width techniques, CMOS circuit designing techniques, and silicide and salicide forming techniques with reduced contact resistance between wiring and substrate and reduced line resistance.
Unlike general CMOS circuits, a communication application RF semiconductor device requires integration of capacitors and inductors in addition to transistors, thus requiring new processing and integrating techniques. As a result, even though the current DRAM and logical device fabrication techniques improve the performance of the communication application RF semiconductor devices to some extent, a technique in which new unitary elements of capacitors and coils are connected to, and integrated with, the current devices becomes very important in fabrication of the communication application RF integrated circuit (IC).
A conventional method for fabricating a communication application RF integrated circuit will now be explained with reference to the attached drawings. FIGS. 1a.about.1b are plane views showing the steps of the conventional method, and FIGS. 2a.about.2g are sectional views showing the steps of the conventional method.
Referring to FIG. 2a, an isolating oxide film 2 is formed on a silicon substrate 1 for electrical insulation between an active region and a unit cell, and a gate insulating film 3 is grown to a thickness of about 80.ANG. on the entire surface by thermal oxidation. Then, a first conductive layer 4 of phosphorous doped polysilicon, which is to be used to form a gate electrode of a transistor and a lower electrode of a capacitor, is deposited to a thickness of about 2000.ANG. on the entire surface by low pressure chemical vapor deposition (LPCVD). An insulating film 5 of silicon oxide, which is to be used as a cap insulating film of the transistor and a dielectric layer of the capacitor, is deposited on the first conductive layer 4 to a thickness of about 700.ANG..
Referring to FIG. 2b, a second conductive layer 6, which is to be used as an upper electrode of the capacitor, is deposited on the insulating film 5 to a thickness of about 2000.ANG. by LPCVD. Referring to FIGS. 1a and 2c, a first photoresist film 7 is formed on the second conductive layer 6 and subjected to exposure and development to define a portion which is to be the upper electrode of the capacitor. Referring to FIG. 2d, using the first photoresist film 7 as a mask, portions of the second conductive layer 6 and the insulating film 5 are selectively removed to form the upper electrode 6a of the capacitor.
Referring to FIG. 2e, the first photoresist film 7 is removed and a second photoresist film 8 is deposited on the entire surface. Referring to FIGS. 1b and 2f, the second photoresist film 8 is subjected to exposure and development to define a capacitor region and a gate region of the transistor, and the remaining photoresist film 8 is then used as a mask in selectively removing exposed portions of the first conductive layer 4 and the gate insulating film 3 to form the lower electrode 6b of the capacitor and the gate electrode 9 of the transistor.
Referring to FIG. 2g, the second photoresist film 8 is removed. An insulating film (a CVD oxide film) is deposited and subjected to anisotropic etching to form sidewall insulating films 10 at sides of upper and lower electrodes 6a and 6b of the capacitor. The sidewall insulating films 10 are also formed at sides of the gate electrode 9 of the transistor. Then, by using the gate electrode 9 of the transistor as a mask, impurity ions are implanted into the active region and the substrate to form source/drain regions 11 of the transistor.
However, the conventional method for fabricating a communication application IC has the following problems. To form the gate of the transistor and the lower electrode of the capacitor, steps are formed during the deposition and exposure of the second photoresist film. This causes inconsistency in focus depths, thereby making it difficult to form an exact and uniform pattern.